1. Field of the Invention
The present invention relates generally to an improved data processing system, and, more specifically, to a computer-implemented method, a data processing system and a computer program product for creating redundant configurations using peripheral component interconnect input/output virtualization configurations.
2. Description of the Related Art
Typical computing devices make use of input/output (I/O) adapters and buses that utilize a version or implementation of the Peripheral Component Interconnect (PCI) standard, originally created by Intel Corporation in the 1990s, and now managed by the PCI-SIG. The Peripheral Component Interconnect (PCI) standard specifies a computer bus for attaching peripheral devices to a computer motherboard. PCI Express, or PCIe, is an implementation of the PCI computer bus that uses existing PCI programming concepts, but bases the computer bus on a completely different and much faster serial physical-layer communications protocol. The physical layer consists, not of a bi-directional bus which can be shared among a plurality of devices, but of single uni-directional links, which are connected to exactly two devices.
With reference to FIG. 1, an exemplary diagram illustrating a system that incorporates a peripheral component interconnect express (PCIe) bus, in accordance with the peripheral component interconnect express specification is presented. The particular system shown in FIG. 1 is a blade enclosure in which a plurality of server blades 101-104 are provided. A server blade is a self-contained computer server designed for high density systems. Server blades have many components removed for space, power and other considerations while still having all the functionality components to be considered a computer. Blade enclosure 100 provides services, such as power, cooling, networking, various interconnects, and management of various server blades 101-104 in blade enclosure 100. Server blades 101-104 and blade enclosure 100 together form a blade system.
As shown in FIG. 1, peripheral component interconnect express is implemented on each of server blades 101-104 and is used to connect to one of peripheral component interconnect express devices 105-112. Each of these server blades 101-104 is then plugged into a slot in blade enclosure 100 which then connects the outputs of the peripheral component interconnect express Ethernet devices 105, 107, 109, and 111 to Ethernet switch 113, via a backplane in blade enclosure 100, which then generates Ethernet connections 115 for external connectivity, for example, communication connections to devices outside blade enclosure 100. Similarly, each of the peripheral component interconnect express storage devices 106, 108, 110, and 112 are connected via the backplane in blade enclosure 100 to storage area network switch 114 which then generates storage area network connections 116 for external connectivity.
Thus, the system shown in FIG. 1 is exemplary of one type of data processing system in which the peripheral component interconnect and/or peripheral component interconnect express specifications are implemented. Other configurations of data processing systems are known that use the peripheral component interconnect and/or peripheral component interconnect express specifications. These systems are varied in architecture and thus, a detailed treatment of each cannot be made herein. For more information regarding peripheral component interconnect and peripheral component interconnect express, reference is made to the peripheral component interconnect and peripheral component interconnect express specifications available from the peripheral component interconnect special interest group (PCI-SIG) website at www.pcisig.com.
In addition to the peripheral component interconnect and peripheral component interconnect express specifications, the peripheral component interconnect special interest group has also defined input/output virtualization (IOV) standards for defining how to design an input/output adapter (IOA) which can be shared by several logical partitions (LPARs). A logical partition is a division of a computer's processors, memory, and storage into multiple sets of resources so that each set of resources can be operated independently with its own operating system instance and applications. The number of logical partitions that can be created depends on the system's processor model and resources available. Typically, partitions are used for different purposes such as database operation, client/server operation, to separate test and production environments, or the like. Each partition can communicate with the other partitions as if the other partition is in a separate machine.
In modern systems that support logical partitions, some resources may be shared amongst the logical partitions. As mentioned above, in the peripheral component interconnect and peripheral component interconnect express specification, one such resource that may be shared is the input/output adapter using input/output virtualization mechanisms.
Further, the peripheral component interconnect special interest group has also defined input output virtualization (IOV) standards for sharing input output adapters between multiple systems. This capability is referred to as multi-root (MR) input output virtualization.
With reference to FIG. 2, an exemplary diagram illustrating a system incorporating a peripheral component interconnect express multi-root input output virtualization is presented. In particular, FIG. 2 illustrates how the architecture shown in FIG. 1 can be modified to share the peripheral component interconnect express devices across multiple systems.
Server blades 201-204 now generate peripheral component interconnect express root ports 205-212 and drive peripheral component interconnect express connections across blade enclosure 200 backplane, instead of incorporating the peripheral component interconnect express devices themselves on sever blades 201-204 as was done with server blades 101-104 in FIG. 1. The peripheral component interconnect express links from each server blade 201-204 are then connected to one of multi-root peripheral component interconnect express switches 213-214 which are in turn connected to peripheral component interconnect express Ethernet/storage devices 217-220. Peripheral component interconnect express Ethernet/storage devices 217-220 connect to the external Ethernet and storage devices through external connectivity 215 and 216. Thus, peripheral component interconnect express devices can be used within blade enclosure 200. This reduces overall costs in that the number of peripheral component interconnect express devices 217-220 may be minimized since they are shared across server blades 201-204 through the use of multi-root peripheral component interconnect express switches 221. Moreover, this may reduce the complexity and cost of server blades 201-204 themselves by not requiring integration of peripheral component interconnect express devices 217-220.
While the peripheral component interconnect special interest group provides a standard for defining how to design an input output adapter which can be shared by several logical partitions, the specification does not define how to connect the input output adapters into a host system. Moreover, the standard only specifies how each function can be assigned to a single system.